Philips 26PFL3512D/12 Specifications Page 89
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Circuit Descriptions, Abbreviation List, and IC Data Sheets
EN 89LC7.2E LA 9.
The pin assignment of all analogue tuners is equal and can be
found in table “Pin assignment analogue tuners”.
Table 9-5 Pin assignment analogue tuners
The pin assignment of the hybrid tuner can be found in table
“Pin assignment hybrid tuner”.
Table 9-6 Pin assignment hybrid tuner
9.4.2 Automatic Gain Control
During analogue reception, the hybrid tuner receives an
external AGC voltage, coming from the demodulator to perform
automatic gain control. During digital reception, no external
AGC voltage is used but the tuners internal AGC loop is used.
9.5 DVB-T Signal Processing
The DVB-T cell on the SSB is built around the “MOJO” MPEG
decoder PNX8314HS (item 7G00) and receives the signal from
the COFDM Channel Decoder TDA10046 (item 7F01). The
(hybrid) tuner TD1316AF (item 1101) supports digital (DVB-T)
reception and transports the signal via the VIM_IBO and
VIP_IBO lines. The digital data stream exits the DVB-T cell
when it is fed to the Trident SVP CX32 Video Processor (item
7202). A Common Interface (CI) slot allows reception of
encoded signals when used with a Conditional Access Module
(CAM) in combination with a smart card. See figure “Block
diagram DVB-T reception” for details.
Figure 9-6 Block diagram DVB-T reception
9.5.1 Common Interface (CI)
Introduction
The digital sets of this chassis are provided with a special slot
called Common Interface (CI). Together with a Conditional
Access Module (CAM) and a smart card, it is possible to
receive scrambled TV programs. This means that it is not
necessary to have a separate Set Top Box to receive digital
cable SDTV and HDTV programs (however this still is
possible).
The removable smart card, distributed by cable companies,
allows you to tune digital and high definition scrambled or
encrypted cable channels through the cable antenna. The
smart card is also required to receive premium digital TV
channels and services (where available) through the cable. A
smart card functionality includes conditional access and copy
protection.
Implementation
1. The receiver receives the digital data stream.
2. The data flows into the Conditional Access Module, which
contains the content provider's unscrambling algorithms.
3. This module verifies the existence of a smart card that
contains the subscriber's authorization code.
4. If the authorization code is accepted, the CAM
unscrambles the data and returns the data to the receiver
(if the code is not accepted, the data remains scrambled,
restricting access).
5. The receiver then decodes the data and outputs it for
viewing.
Pin number Description DC voltage (V)
1 RF AGC voltage 3.3 - 4.5 (weak or no signal)
< 3.3 (strong signal)
2n.c.
3I
2
C-bus address select 0
4 SCL 0 to 3.3
5 SDA 0 to 3.3
6n.c.
7 supply voltage 5 ±0.25
8n.c.
9 tuning supply voltage 33
10 n.c.
11 TV IF output
Pin number Description DC voltage (V)
1n.c.
2 RF AGC voltage 3.3 - 4.5 (weak or no signal)
< 3.3 (strong signal)
3I
2
C-bus address select 0
4 SCL 0 to 3.3
5 SDA 0 to 3.3
6 4 MHz reference output
7 supply voltage 5 ±0.25
8 broadband IF output
9 IF AGC voltage 0 to 3
10 narrowband IF output
11 narrowband IF output
1V2_MOJO
1V8S_SW
3V3_MOJO
LC07 EU DVB Cell
TRIDENT/uP
MOJO
LPF
IBO_R,G,B
IBO_CVBS
TDA10046
Channel
Decoder
HYBRID
TUNER
MUX
TDA_SDA
TDA_SCL
I
2
C_SCL
I
2
C_SDA
DVB_SW
4MHz CLK
SCL
SDA
VIP_IBO
VIM_IBO
IF_AGC_IBO
RF_AGC_IBO
Multi
Sound
Processor
I
2
S (SD, WS, SCLK)
CI SLOT
(STV0700)
UART
TXD0
RXD0
IBO_I
2
C_SD
IBO_I
2
C_SCL
IBO_IRQ
RESET_n
FLASH
SDRAM
I
2
C_LOCAL SDA
I
2
C_LOCAL SCL
RESET_FE_n
RESET_STV
SCART 2
G_16860_057.eps
310107
- Colour Television Chassis 1
- EN 2 LC7.2E LA1 2
- 1.1 Technical Specifications 2
- EN 3LC7.2E LA 1 3
- 1.2 Connection Overview 3
- EN 4 LC7.2E LA1 4
- 1.3 Chassis Overview 4
- EN 5LC7.2E LA 1 5
- EN 6 LC7.2E LA2 6
- 2.1 Safety Instructions 6
- 2.2 Warnings 6
- 2.3 Notes 6
- 3. Directions for Use 7
- 4. Mechanical Instructions 8
- G_16860_064.eps 9
- G_16860_085.eps 9
- H_16940_009.eps 10
- G_16860_091.eps 10
- Mechanical Instructions 11
- EN 11LC7.2E LA 4 11
- 4.2 Service Positions 11
- 4.3 Assy/Panel Removal 11
- G_16850_009.eps 12
- EN 13LC7.2E LA 4 13
- EN 14 LC7.2E LA4 14
- EN 15LC7.2E LA 4 15
- 4.4 Set Re-assembly 15
- EN 16 LC7.2E LA5 16
- 5.1 Test Points 16
- 5.2 Service Modes 16
- EN 17LC7.2E LA 5 17
- EN 18 LC7.2E LA5 18
- EN 19LC7.2E LA 5 19
- E_14970_041.eps 20
- EN 21LC7.2E LA 5 21
- 5.3 Service Tools 21
- EN 22 LC7.2E LA5 22
- 5.4 Error Codes 22
- EN 23LC7.2E LA 5 23
- 5.6 Software Upgrading 23
- EN 24 LC7.2E LA5 24
- EN 25LC7.2E LA 5 25
- EN 26 LC7.2E LA5 26
- SEMISTANDBY/ STANDBY 27
- G_16860_072.eps 28
- INVERTER 29
- MAIN SUPPLY 29
- INVERTER INVERTER 30
- PANEL HV 31
- CONNECTOR 31
- Block Diagram Video 35
- Block Diagram Audio 36
- 37LC7.2E LA 6 37
- 3139 123 6261.1 38
- I2C IC’s Overview 39
- Supply Lines Overview 40
- DC - DC 41
- B03A B03A 42
- B03B B03B 43
- B03C B03C 44
- B03D B03D 45
- B03E B03E 46
- B03F B03F 47
- B04A B04A 48
- B04B B04B 49
- B04C B04C 50
- B06A B06A 51
- B06B B06B 52
- B06C B06C 53
- B06D B06D 54
- SSB: Audio 55
- 3104 313 6261.1 56
- G_16860_026.eps 56
- Netname Schematic 56
- 58LC7.2E LA 7 58
- 59LC7.2E LA 7 59
- 60LC7.2E LA 7 60
- 61LC7.2E LA 7 61
- 63LC7.2E LA 7 63
- 64LC7.2E LA 7 64
- 65LC7.2E LA 7 65
- 66LC7.2E LA 7 66
- SIDE FACING SIDE AV 67
- 3139 123 6229.1 68
- E_06532_012.eps 69
- 3139 123 6219.1 70
- OCM ON CHIP MICROCONTROLLER 71
- FLASH & NVM 72
- G_16860_021.eps 73
- 3139 123 6225.1 73
- LDVS OUT 74
- SUPPLY IN 75
- DDR SDRAM 76
- DC POWER SUPPLY 77
- Layout 1080P Panel (Top Side) 78
- 3139 123 6210.1 80
- 8. Alignments 81
- Alignments 82
- EN 82 LC7.2E LA8 82
- 8.4 Option Settings 82
- EN 83LC7.2E LA 8 83
- EN 84 LC7.2E LA8 84
- EN 85LC7.2E LA 8 85
- EN 86 LC7.2E LA9 86
- 9.1 Introduction 86
- G_16860_051.eps 87
- EN 88 LC7.2E LA9 88
- 9.3 DC/DC converters 88
- 9.4 Front-End 88
- EN 89LC7.2E LA 9 89
- 9.5 DVB-T Signal Processing 89
- EN 90 LC7.2E LA9 90
- 9.6 Video Processing 90
- 9.7 Memory addressing 90
- EN 91LC7.2E LA 9 91
- 9.8 1080p Panel (if present) 91
- 9.9 Audio Processing 91
- EN 92 LC7.2E LA9 92
- 9.10 HDMI 92
- EN 93LC7.2E LA 9 93
- 9.11 Abbreviation List 93
- EN 94 LC7.2E LA9 94
- TDA10046 95
- H_16861_001.eps 96
- (SQFP208 top view) 97
- EN 98 LC7.2E LA9 98
- EN 99LC7.2E LA 9 99
- Block Diagram 100
- Pin Configuration 100
- G_16860_073.eps 100
- EN 102 LC7.2E LA9 102
- Spare Parts List 103
- EN 103LC7.2E LA 10 103
- EN 104 LC7.2E LA10 104
- Small Signal Board [B] 104
- EN 105LC7.2E LA 10 105
- EN 106 LC7.2E LA10 106
- EN 107LC7.2E LA 10 107
- EN 108 LC7.2E LA10 108
- Side I/O Panel [D] 108
- Keyboard Control Panel [E] 108
- EN 109LC7.2E LA 10 109
- 1080P Panel (F) 109
- EN 110 LC7.2E LA10 110
- IR LED Panel [J] 110
- 11. Revision List 111
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